1. Field of the Invention
The present invention relates to an electronic circuit apparatus and particularly to an electronic circuit apparatus applied with a so-called multi-chip module technique of assembling a plurality of unit circuit devices, such as semiconductor chips, as one electronic device, and an integrated circuit device used therein.
2. Description of the Related Art
Along with evolutions in the digital network information society, digital home-use appliances have evolved as multimedia apparatuses and compact electronic apparatuses represented by portable information terminals have developed remarkably. As a result, demands for smarter and more advanced large scale integrated circuits (LSI) have increased and a System-on-chip (SOC) installed with sophisticated system functions on one chip has been focused.
The system-on-chip is to realize on one silicon LSI chip a system which has conventionally been realized by a substrate mounted with a large number of discrete devices, and it has the large advantages of a low power consumption, a high performance and a reduction of mounting area.
Recently, however, a longer period of developing the system-on-chip and a development risk for integrating a variety of system functions on one chip have become concerns, and attention has drawn to a system-in-package (SIP) technique potentially able to realize equivalent functions to those of the system-on-chip by a short time and a low cost.
The system-in-package has realized a system by installing a plurality of LSIs on a single package, which is a kind of multi-chip module. The system-in-package finally aims to supply equivalent functions to those of the system-on-chip at a low cost.
In a multi-chip module of the related art, such as the system-in-package, an outermost rim portion of respective semiconductor chips mounted on a substrate is provided with a plurality of connection pads for connecting with other semiconductor chips. In each of the respective semiconductor chips, input/output interface circuits for electrical matching, for example, adjustment of a voltage level between the semiconductor chip and an electronic device connected to outside the module, are provided between the plurality of connection pads and electronic circuits integrated on the chip for realizing the functions of the system. Electrical connection between the semiconductor chips is made by connecting the connection pads of a plurality of semiconductor chips to be connected to each other by wire bonding or soldering ball, etc.
In a lecture on packaging in session 9 at the SEMI Technology Symposium 2001, it was pointed out that when using standard chips as semiconductor chips to be mounted for reducing the costs in the system-in-package of the related art, an excessive power consumption is caused by using standard interface circuits. This is because of an increase of the load capacity in signal paths due to the existence of input/output interfaces. Also, in this lecture, it was proposed to mount on a semiconductor chip input/output interface circuits with a low load capacity for multi-chip modules separately from standard input/output interface circuits.
In a multi-chip module, such as the system-in-package, mounted with a plurality of semiconductor chips, however, the pads of each semiconductor chip include not only pads used for connecting between electronic circuits in the chip with outside the module but also pads used for mutually connecting inside semiconductor chips.
Accordingly, it is a waste of an area to provide an input/output interface between all pads and electronic circuits. Furthermore, it leads to an addition of a load capacity to signal paths and charging/discharging thereof increases power consumption, so that when the input/output interface circuit is provided for all pads, excessive power is consumed as a whole.
From the above viewpoint, the Japanese Unexamined Patent Publication No. H7-153902 discloses a technique of preparing a semiconductor chip composed only of a core portion of a logic circuit and preparing a semiconductor chip on which only an input/output interface circuit is formed at an outer rim portion of the system-in-package so as to connect between semiconductor chips composed only of a core portion without using an input/output interface circuit.
However, to realize a high speed system-in-package with a low power consumption, it is important to apply neither a method of using standard semiconductor chips as in the related art nor a method of uniformly producing semiconductor chips having separated functions, as in the technique described in the Japanese Unexamined Patent Publication No. H7-153902, but to design a layout wherein an arrangement of pads and input/output interface circuits, etc. formed on the respective semiconductor chips becomes optimal so as to attain the shortest distance connection between the respective semiconductor chips in consideration of the arrangement and connection relationship of the plurality of semiconductor chips to be mounted for realizing desired functions.